Translation Lookaside Buffer
转译后备缓冲区（translation lookaside buffer，TLB） 是操作系统中存储虚拟内存到物理内存映射的缓冲区，用于减少访问用户内存区域所需的时间。
TLB 驻留在 CPU 和 CPU 缓存之间，或 CPU 缓存和内存之间，或多级缓存之间。现代硬件普遍在内存管理硬件中包含一个或多个 TLB。
TLB Shootdown
TLB 可能存在于每个 CPU 核心的缓存中，当某个核心修改了 TLB，由于不像 L1/L2 缓存有硬件协议保证一致性，操作系统只能自己维护 TLB 的一致性，于是操作系统触发 inter-processor interrupts（IPIs）通知其他核心更新 TLB，这个过程较多 TLB shootdown。
A translation lookaside buffer (TLB) is a memory cache that stores the recent translations of virtual memory to physical memory. It is used to reduce the time taken to access a user memory location. It can be called an address-translation cache. It is a part of the chip's memory-management unit (MMU). A TLB may reside between the CPU and the CPU cache, between CPU cache and the main memory or between the different levels of the multi-level cache. The majority of desktop, laptop, and server processors include one or more TLBs in the memory-management hardware, and it is nearly always present in any processor that utilizes paged or segmented virtual memory.[1]
But no such hardware support exists for TLB consistency maintenance; therefore, this responsibility falls upon the kernel itself. The Linux kernel fulfills this role by means of inter-processor interrupts (IPIs) called TLB Shootdowns.[2]